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Multi-path dynamic routing algorithm
Multi-path dynamic routing algorithm
Filed: January 22nd, 2002 [Granted]
Patent Number: 7233574
US007233574B2 (12) United States Patent Worfolk et al. (io) Patent No.: (45) Date of Patent: US 7233574 B2 Jun. 19, 2007 (54) MULTI-PATH DYNAMIC ROUTING ...
Direct/indirect transmission of information using a multi-tiered full-graph ...
Direct/indirect transmission of information using a multi-tiered full-graph ...
Filed: August 27th, 2007 [Granted]
Patent Number: 7822889
7184440 Bl 2/2007 Sterne et al. 7200741 Bl 4/2007 Mine 7215644 B2 5/2007 Wu et al. 7230924 B2 6/2007 Chiu et al. 7233574 B2 6/2007 Worfolk et al.
System for providing a cluster-wide system clock in a multi-tiered full ...
System for providing a cluster-wide system clock in a multi-tiered full ...
Filed: August 31st, 2007 [Granted]
Patent Number: 7827428
7184440 Bl 2/2007 Sterne et al. 7200741 Bl 4/2007 Mine 7215644 B2 5/2007 Wu et al. 7230924 B2 6/2007 Chiu et al. 7233574 B2 6/2007 Worfolk et al.
System and method for handling indirect routing of information between ...
System and method for handling indirect routing of information between ...
Filed: August 27th, 2007 [Granted]
Patent Number: 7769892
7184440 Bl 2/2007 Sterne et al. 7200741 Bl 4/2007 Mine 7215644 B2 5/2007 Wu et al. 7230924 B2 6/2007 Chiu et al. 7233574 B2 6/2007 Worfolk et al.
Providing reliability of communication between supernodes of a multi-tiered ...
Providing reliability of communication between supernodes of a multi-tiered ...
Filed: August 27th, 2007 [Granted]
Patent Number: 7793158
Page 2 US PATENT DOCUMENTS Chen et al. Michelson Annapareddy et al. ... 7184440 Bl 2/2007 7200741 Bl 4/2007 7215644 B2 5/2007 7230924 B2 6/2007 7233574 B2 ...
System and method for dynamically supporting indirect routing within a multi ...
System and method for dynamically supporting indirect routing within a multi ...
Filed: August 27th, 2007 [Granted]
Patent Number: 7840703
7230924 B2 6/2007 Chiuetal. 7233574 B2 6/2007 Worfolketal. 7.239.641 Bl 7/2007 Banks etal. 7249210 B2 7/2007 Gunasanetal. 7308558 B2 12/2007 Arimilli et al.
Cluster-wide system clock in a multi-tiered full-graph interconnect architecture
Cluster-wide system clock in a multi-tiered full-graph interconnect architecture
Filed: September 11th, 2007 [Granted]
Patent Number: 7921316
Chen et al. Michel son Matsuoka et al. Annapareddy et al. Gregg et al. ... Bl 2/ 2007 7200741 Bl 4/2007 7215644 B2 5/2007 7230924 B2 6/2007 7233574 B2 6/2007 ...
Routing information through a data processing system implementing a multi ...
Routing information through a data processing system implementing a multi ...
Filed: August 27th, 2007 [Granted]
Patent Number: 7904590
Thorson et al. Barker et al. Wilkinson et al. Birrittella et al. ... 2/2007 7200741 Bl 4/2007 7215644 B2 5/2007 7230924 B2 6/2007 7233574 B2 6/2007 7239641 ...