Accordingly, data words (eg, "John" and "Joan") can be stored in respective rows of quad CAM cells, and a compare operation can be performed to identify ...

10), and a quad CAM array 120G. Quad CAM array 120G includes an array of quad CAM cells 120F, also described above with reference to FIG.

10), and a quad CAM array 120G. Quad CAM array 120G includes an array of quad CAM cells 120F, also described above with reference to FIG.

6 shows a DRAM-based quad CAM cell 300 according to a third embodiment of the present invention. DRAM- based quad CAM cell 300 includes 4T DRAM cell 210, ...

To refresh DRAM CAM cell 125B, data values at storage nodes Nil and N12 are ... to DRAM CAM array 120B, thereby supporting the quad CAM cell operation, ...

In some embodiments, CAM cells 601 cay be quad cells. Rows of CAM cells 601 are coupled horizontally by match lines 612. Columns of CAM cells 601 are ...

1 TERNARY CAM CELL WITH DRAM MASK CIRCUIT FIELD OF THE INVENTION The present .... For example, a four state ("quad" CAM cell stores a logic high value, ...

3B and 3C complete the illustration of the first four consecutive rows of CAM cells within a left side CAM array 12a, with FIG. 3B illustrating the quad ...