Search patents:
AIR TABLE
AIR TABLE
Filed: June 15th, 1967 [Granted]
Patent Number: 3429544
25, 1969 TW WILLIAMS III AIR TABLE Filed June 15, 1967 3429544 ...
CAB WHEEL
CAB WHEEL
Filed: May 12th, 1922 [Granted]
Patent Number: 1423381
1433381. TW WILLIAMS, CAR WHEEL. APPLICATION FILED MAY 12, 1922. Patented July 18, 1922.
Scan-load-based dynamic scan configuration
Scan-load-based dynamic scan configuration
Filed: January 16th, 2009 [Granted]
Patent Number: 7702980
1 EB Eichelberger and TW Williams, "A Logic Design Structure for LSI Testing," in the ... 165-178, May, 1978; EB Eichelberger, TW Williams, EI Muehldorf, ...
Chip partitioning aid (CPA)-A structure for test pattern generation for ...
Chip partitioning aid (CPA)-A structure for test pattern generation for ...
Filed: April 20th, 1982 [Granted]
Patent Number: 4503386
31, 1978 to EB Eichelberger and TW Williams and of common assignee. US Pat. No. 4051353 (Ser. No. 701055) entitled 10 "Implementation of Level Sensitive ...
Method of concurrently testing each of a plurality of interconnected ...
Method of concurrently testing each of a plurality of interconnected ...
Filed: April 10th, 1984 [Granted]
Patent Number: 4509008
31, 1978 to EB Eichelberger and TW Williams and of common assignee. ... 13, 1977 to EB Eichelberger, EI Muehldorf, RG Walther and TW Williams and of common ...
Method of level sensitive testing a functional logic system with embedded array
Method of level sensitive testing a functional logic system with embedded array
Filed: June 30th, 1976 [Granted]
Patent Number: 4074851
EB Eichelberger, EI Muehldorf, RG Walther and TW Williams, and of common assignee US Patent Application Ser. No. 701052, entitled "Level Sensitive Embedded ...
Method of propagation delay testing a level sensitive array logic system
Method of propagation delay testing a level sensitive array logic system
Filed: June 30th, 1976 [Granted]
Patent Number: 4063080
EB Eichelberger, EI Muehldorf, RG Walther and TW Williams, and of common assignee. US patent application Ser. No. 701054, entitled 20 "Method of Level ...
LSI Circuitry conforming to level sensitive scan design (LSSD) rules and ...
LSI Circuitry conforming to level sensitive scan design (LSSD) rules and ...
Filed: July 26th, 1979 [Granted]
Patent Number: 4298980
10 3783254, 3761695, 3784907 and the publication "A Logic Design Structure For LSI Testability" by EB Eichelberger and TW Williams, 14th Design Automation ...